[chibi@f40 ~]$ cat /etc/redhat-release Fedora release 40 (Rawhide) [chibi@f40 ~]$ nvcc -V nvcc: NVIDIA (R) Cuda compiler driver Copyright (c) 2005-2023 NVIDIA Corporation Built on Fri_Sep__8_19:17:24_PDT_2023 Cuda compilation tools, release 12.3, V12.3.52 Build cuda_12.3.r12.3/compiler.33281558_0 [chibi@f40 ~]$ nvidia-smi Fri Nov 3 09:25:01 2023 +---------------------------------------------------------------------------------------+ | NVIDIA-SMI 545.23.06 Driver Version: 545.23.06 CUDA Version: 12.3 | |-----------------------------------------+----------------------+----------------------+ | GPU Name Persistence-M | Bus-Id Disp.A | Volatile Uncorr. ECC | | Fan Temp Perf Pwr:Usage/Cap | Memory-Usage | GPU-Util Compute M. | | | | MIG M. | |=========================================+======================+======================| | 0 NVIDIA TITAN RTX Off | 00000000:41:00.0 On | N/A | | 41% 27C P8 19W / 280W | 464MiB / 24576MiB | 0% Default | | | | N/A | +-----------------------------------------+----------------------+----------------------+ +---------------------------------------------------------------------------------------+ | Processes: | | GPU GI CI PID Type Process name GPU Memory | | ID ID Usage | |=======================================================================================| | 0 N/A N/A 4549 G /usr/libexec/Xorg 456MiB | | 0 N/A N/A 5194 G xfwm4 4MiB | | 0 N/A N/A 7075 G nvidia-settings 0MiB | +---------------------------------------------------------------------------------------+ [chibi@f40 ~]$ sensors k10temp-pci-00cb Adapter: PCI adapter Tctl: +34.1°C Tccd1: +31.5°C Tccd2: +35.0°C Tccd3: +32.5°C Tccd4: +33.0°C Tccd5: +34.2°C Tccd6: +33.8°C Tccd7: +32.2°C Tccd8: +33.2°C nvme-pci-6200 Adapter: PCI adapter Composite: +26.9°C (low = -273.1°C, high = +82.8°C) (crit = +84.8°C) Sensor 1: +26.9°C (low = -273.1°C, high = +65261.8°C) ucsi_source_psy_4_00081-i2c-4-08 Adapter: NVIDIA GPU I2C adapter in0: 0.00 V (min = +0.00 V, max = +0.00 V) curr1: 0.00 A (max = +0.00 A) k10temp-pci-00c3 Adapter: PCI adapter Tctl: +33.5°C Tccd1: +33.2°C Tccd2: +34.2°C Tccd3: +33.0°C Tccd4: +33.5°C Tccd5: +34.5°C Tccd6: +33.0°C Tccd7: +31.8°C Tccd8: +32.0°C [chibi@f40 ~]$ lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 48 bits physical, 48 bits virtual Byte Order: Little Endian CPU(s): 256 On-line CPU(s) list: 0-255 Vendor ID: AuthenticAMD Model name: AMD EPYC 7763 64-Core Processor CPU family: 25 Model: 1 Thread(s) per core: 2 Core(s) per socket: 64 Socket(s): 2 Stepping: 1 Frequency boost: enabled CPU(s) scaling MHz: 43% CPU max MHz: 3529.0520 CPU min MHz: 1500.0000 BogoMIPS: 4900.28 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pa t pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid e xtd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perf ctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 invpci d cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsav ec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_lo cal user_shstk clzero irperf xsaveerptr rdpru wbnoinvd amd_ppin brs arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushb yasid decodeassists pausefilter pfthreshold v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca debug_swap Virtualization features: Virtualization: AMD-V Caches (sum of all): L1d: 4 MiB (128 instances) L1i: 4 MiB (128 instances) L2: 64 MiB (128 instances) L3: 512 MiB (16 instances) NUMA: NUMA node(s): 2 NUMA node0 CPU(s): 0-63,128-191 NUMA node1 CPU(s): 64-127,192-255 Vulnerabilities: Gather data sampling: Not affected Itlb multihit: Not affected L1tf: Not affected Mds: Not affected Meltdown: Not affected Mmio stale data: Not affected Retbleed: Not affected Spec rstack overflow: Vulnerable: Safe RET, no microcode Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitiza tion Spectre v2: Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP always- on, RSB filling, PBRSB-eIBRS Not affected Srbds: Not affected Tsx async abort: Not affected [chibi@f40 ~]$ lstopo Machine (252GB total) Package L#0 NUMANode L#0 (P#0 126GB) L3 L#0 (32MB) L2 L#0 (512KB) + L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 PU L#0 (P#0) PU L#1 (P#128) L2 L#1 (512KB) + L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 PU L#2 (P#1) PU L#3 (P#129) L2 L#2 (512KB) + L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 PU L#4 (P#2) PU L#5 (P#130) L2 L#3 (512KB) + L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 PU L#6 (P#3) PU L#7 (P#131) L2 L#4 (512KB) + L1d L#4 (32KB) + L1i L#4 (32KB) + Core L#4 PU L#8 (P#4) PU L#9 (P#132) L2 L#5 (512KB) + L1d L#5 (32KB) + L1i L#5 (32KB) + Core L#5 PU L#10 (P#5) PU L#11 (P#133) L2 L#6 (512KB) + L1d L#6 (32KB) + L1i L#6 (32KB) + Core L#6 PU L#12 (P#6) PU L#13 (P#134) L2 L#7 (512KB) + L1d L#7 (32KB) + L1i L#7 (32KB) + Core L#7 PU L#14 (P#7) PU L#15 (P#135) L3 L#1 (32MB) L2 L#8 (512KB) + L1d L#8 (32KB) + L1i L#8 (32KB) + Core L#8 PU L#16 (P#8) PU L#17 (P#136) L2 L#9 (512KB) + L1d L#9 (32KB) + L1i L#9 (32KB) + Core L#9 PU L#18 (P#9) PU L#19 (P#137) L2 L#10 (512KB) + L1d L#10 (32KB) + L1i L#10 (32KB) + Core L#10 PU L#20 (P#10) PU L#21 (P#138) L2 L#11 (512KB) + L1d L#11 (32KB) + L1i L#11 (32KB) + Core L#11 PU L#22 (P#11) PU L#23 (P#139) L2 L#12 (512KB) + L1d L#12 (32KB) + L1i L#12 (32KB) + Core L#12 PU L#24 (P#12) PU L#25 (P#140) L2 L#13 (512KB) + L1d L#13 (32KB) + L1i L#13 (32KB) + Core L#13 PU L#26 (P#13) PU L#27 (P#141) L2 L#14 (512KB) + L1d L#14 (32KB) + L1i L#14 (32KB) + Core L#14 PU L#28 (P#14) PU L#29 (P#142) L2 L#15 (512KB) + L1d L#15 (32KB) + L1i L#15 (32KB) + Core L#15 PU L#30 (P#15) PU L#31 (P#143) L3 L#2 (32MB) L2 L#16 (512KB) + L1d L#16 (32KB) + L1i L#16 (32KB) + Core L#16 PU L#32 (P#16) PU L#33 (P#144) L2 L#17 (512KB) + L1d L#17 (32KB) + L1i L#17 (32KB) + Core L#17 PU L#34 (P#17) PU L#35 (P#145) L2 L#18 (512KB) + L1d L#18 (32KB) + L1i L#18 (32KB) + Core L#18 PU L#36 (P#18) PU L#37 (P#146) L2 L#19 (512KB) + L1d L#19 (32KB) + L1i L#19 (32KB) + Core L#19 PU L#38 (P#19) PU L#39 (P#147) L2 L#20 (512KB) + L1d L#20 (32KB) + L1i L#20 (32KB) + Core L#20 PU L#40 (P#20) PU L#41 (P#148) L2 L#21 (512KB) + L1d L#21 (32KB) + L1i L#21 (32KB) + Core L#21 PU L#42 (P#21) PU L#43 (P#149) L2 L#22 (512KB) + L1d L#22 (32KB) + L1i L#22 (32KB) + Core L#22 PU L#44 (P#22) PU L#45 (P#150) L2 L#23 (512KB) + L1d L#23 (32KB) + L1i L#23 (32KB) + Core L#23 PU L#46 (P#23) PU L#47 (P#151) L3 L#3 (32MB) L2 L#24 (512KB) + L1d L#24 (32KB) + L1i L#24 (32KB) + Core L#24 PU L#48 (P#24) PU L#49 (P#152) L2 L#25 (512KB) + L1d L#25 (32KB) + L1i L#25 (32KB) + Core L#25 PU L#50 (P#25) PU L#51 (P#153) L2 L#26 (512KB) + L1d L#26 (32KB) + L1i L#26 (32KB) + Core L#26 PU L#52 (P#26) PU L#53 (P#154) L2 L#27 (512KB) + L1d L#27 (32KB) + L1i L#27 (32KB) + Core L#27 PU L#54 (P#27) PU L#55 (P#155) L2 L#28 (512KB) + L1d L#28 (32KB) + L1i L#28 (32KB) + Core L#28 PU L#56 (P#28) PU L#57 (P#156) L2 L#29 (512KB) + L1d L#29 (32KB) + L1i L#29 (32KB) + Core L#29 PU L#58 (P#29) PU L#59 (P#157) L2 L#30 (512KB) + L1d L#30 (32KB) + L1i L#30 (32KB) + Core L#30 PU L#60 (P#30) PU L#61 (P#158) L2 L#31 (512KB) + L1d L#31 (32KB) + L1i L#31 (32KB) + Core L#31 PU L#62 (P#31) PU L#63 (P#159) L3 L#4 (32MB) L2 L#32 (512KB) + L1d L#32 (32KB) + L1i L#32 (32KB) + Core L#32 PU L#64 (P#32) PU L#65 (P#160) L2 L#33 (512KB) + L1d L#33 (32KB) + L1i L#33 (32KB) + Core L#33 PU L#66 (P#33) PU L#67 (P#161) L2 L#34 (512KB) + L1d L#34 (32KB) + L1i L#34 (32KB) + Core L#34 PU L#68 (P#34) PU L#69 (P#162) L2 L#35 (512KB) + L1d L#35 (32KB) + L1i L#35 (32KB) + Core L#35 PU L#70 (P#35) PU L#71 (P#163) L2 L#36 (512KB) + L1d L#36 (32KB) + L1i L#36 (32KB) + Core L#36 PU L#72 (P#36) PU L#73 (P#164) L2 L#37 (512KB) + L1d L#37 (32KB) + L1i L#37 (32KB) + Core L#37 PU L#74 (P#37) PU L#75 (P#165) L2 L#38 (512KB) + L1d L#38 (32KB) + L1i L#38 (32KB) + Core L#38 PU L#76 (P#38) PU L#77 (P#166) L2 L#39 (512KB) + L1d L#39 (32KB) + L1i L#39 (32KB) + Core L#39 PU L#78 (P#39) PU L#79 (P#167) L3 L#5 (32MB) L2 L#40 (512KB) + L1d L#40 (32KB) + L1i L#40 (32KB) + Core L#40 PU L#80 (P#40) PU L#81 (P#168) L2 L#41 (512KB) + L1d L#41 (32KB) + L1i L#41 (32KB) + Core L#41 PU L#82 (P#41) PU L#83 (P#169) L2 L#42 (512KB) + L1d L#42 (32KB) + L1i L#42 (32KB) + Core L#42 PU L#84 (P#42) PU L#85 (P#170) L2 L#43 (512KB) + L1d L#43 (32KB) + L1i L#43 (32KB) + Core L#43 PU L#86 (P#43) PU L#87 (P#171) L2 L#44 (512KB) + L1d L#44 (32KB) + L1i L#44 (32KB) + Core L#44 PU L#88 (P#44) PU L#89 (P#172) L2 L#45 (512KB) + L1d L#45 (32KB) + L1i L#45 (32KB) + Core L#45 PU L#90 (P#45) PU L#91 (P#173) L2 L#46 (512KB) + L1d L#46 (32KB) + L1i L#46 (32KB) + Core L#46 PU L#92 (P#46) PU L#93 (P#174) L2 L#47 (512KB) + L1d L#47 (32KB) + L1i L#47 (32KB) + Core L#47 PU L#94 (P#47) PU L#95 (P#175) L3 L#6 (32MB) L2 L#48 (512KB) + L1d L#48 (32KB) + L1i L#48 (32KB) + Core L#48 PU L#96 (P#48) PU L#97 (P#176) L2 L#49 (512KB) + L1d L#49 (32KB) + L1i L#49 (32KB) + Core L#49 PU L#98 (P#49) PU L#99 (P#177) L2 L#50 (512KB) + L1d L#50 (32KB) + L1i L#50 (32KB) + Core L#50 PU L#100 (P#50) PU L#101 (P#178) L2 L#51 (512KB) + L1d L#51 (32KB) + L1i L#51 (32KB) + Core L#51 PU L#102 (P#51) PU L#103 (P#179) L2 L#52 (512KB) + L1d L#52 (32KB) + L1i L#52 (32KB) + Core L#52 PU L#104 (P#52) PU L#105 (P#180) L2 L#53 (512KB) + L1d L#53 (32KB) + L1i L#53 (32KB) + Core L#53 PU L#106 (P#53) PU L#107 (P#181) L2 L#54 (512KB) + L1d L#54 (32KB) + L1i L#54 (32KB) + Core L#54 PU L#108 (P#54) PU L#109 (P#182) L2 L#55 (512KB) + L1d L#55 (32KB) + L1i L#55 (32KB) + Core L#55 PU L#110 (P#55) PU L#111 (P#183) L3 L#7 (32MB) L2 L#56 (512KB) + L1d L#56 (32KB) + L1i L#56 (32KB) + Core L#56 PU L#112 (P#56) PU L#113 (P#184) L2 L#57 (512KB) + L1d L#57 (32KB) + L1i L#57 (32KB) + Core L#57 PU L#114 (P#57) PU L#115 (P#185) L2 L#58 (512KB) + L1d L#58 (32KB) + L1i L#58 (32KB) + Core L#58 PU L#116 (P#58) PU L#117 (P#186) L2 L#59 (512KB) + L1d L#59 (32KB) + L1i L#59 (32KB) + Core L#59 PU L#118 (P#59) PU L#119 (P#187) L2 L#60 (512KB) + L1d L#60 (32KB) + L1i L#60 (32KB) + Core L#60 PU L#120 (P#60) PU L#121 (P#188) L2 L#61 (512KB) + L1d L#61 (32KB) + L1i L#61 (32KB) + Core L#61 PU L#122 (P#61) PU L#123 (P#189) L2 L#62 (512KB) + L1d L#62 (32KB) + L1i L#62 (32KB) + Core L#62 PU L#124 (P#62) PU L#125 (P#190) L2 L#63 (512KB) + L1d L#63 (32KB) + L1i L#63 (32KB) + Core L#63 PU L#126 (P#63) PU L#127 (P#191) HostBridge PCIBridge PCI 25:00.0 (SATA) PCIBridge PCI 26:00.0 (SATA) HostBridge PCIBridge PCI 41:00.0 (VGA) PCIBridge PCI 44:00.0 (SATA) PCIBridge PCI 45:00.0 (SATA) HostBridge PCIBridge PCI 62:00.0 (NVMExp) Block(Disk) "nvme0n1" PCIBridge PCI 63:00.0 (Ethernet) Net "enp99s0f0" PCI 63:00.1 (Ethernet) Net "enp99s0f1" PCIBridge PCIBridge PCI 65:00.0 (VGA) Package L#1 NUMANode L#1 (P#1 126GB) L3 L#8 (32MB) L2 L#64 (512KB) + L1d L#64 (32KB) + L1i L#64 (32KB) + Core L#64 PU L#128 (P#64) PU L#129 (P#192) L2 L#65 (512KB) + L1d L#65 (32KB) + L1i L#65 (32KB) + Core L#65 PU L#130 (P#65) PU L#131 (P#193) L2 L#66 (512KB) + L1d L#66 (32KB) + L1i L#66 (32KB) + Core L#66 PU L#132 (P#66) PU L#133 (P#194) L2 L#67 (512KB) + L1d L#67 (32KB) + L1i L#67 (32KB) + Core L#67 PU L#134 (P#67) PU L#135 (P#195) L2 L#68 (512KB) + L1d L#68 (32KB) + L1i L#68 (32KB) + Core L#68 PU L#136 (P#68) PU L#137 (P#196) L2 L#69 (512KB) + L1d L#69 (32KB) + L1i L#69 (32KB) + Core L#69 PU L#138 (P#69) PU L#139 (P#197) L2 L#70 (512KB) + L1d L#70 (32KB) + L1i L#70 (32KB) + Core L#70 PU L#140 (P#70) PU L#141 (P#198) L2 L#71 (512KB) + L1d L#71 (32KB) + L1i L#71 (32KB) + Core L#71 PU L#142 (P#71) PU L#143 (P#199) L3 L#9 (32MB) L2 L#72 (512KB) + L1d L#72 (32KB) + L1i L#72 (32KB) + Core L#72 PU L#144 (P#72) PU L#145 (P#200) L2 L#73 (512KB) + L1d L#73 (32KB) + L1i L#73 (32KB) + Core L#73 PU L#146 (P#73) PU L#147 (P#201) L2 L#74 (512KB) + L1d L#74 (32KB) + L1i L#74 (32KB) + Core L#74 PU L#148 (P#74) PU L#149 (P#202) L2 L#75 (512KB) + L1d L#75 (32KB) + L1i L#75 (32KB) + Core L#75 PU L#150 (P#75) PU L#151 (P#203) L2 L#76 (512KB) + L1d L#76 (32KB) + L1i L#76 (32KB) + Core L#76 PU L#152 (P#76) PU L#153 (P#204) L2 L#77 (512KB) + L1d L#77 (32KB) + L1i L#77 (32KB) + Core L#77 PU L#154 (P#77) PU L#155 (P#205) L2 L#78 (512KB) + L1d L#78 (32KB) + L1i L#78 (32KB) + Core L#78 PU L#156 (P#78) PU L#157 (P#206) L2 L#79 (512KB) + L1d L#79 (32KB) + L1i L#79 (32KB) + Core L#79 PU L#158 (P#79) PU L#159 (P#207) L3 L#10 (32MB) L2 L#80 (512KB) + L1d L#80 (32KB) + L1i L#80 (32KB) + Core L#80 PU L#160 (P#80) PU L#161 (P#208) L2 L#81 (512KB) + L1d L#81 (32KB) + L1i L#81 (32KB) + Core L#81 PU L#162 (P#81) PU L#163 (P#209) L2 L#82 (512KB) + L1d L#82 (32KB) + L1i L#82 (32KB) + Core L#82 PU L#164 (P#82) PU L#165 (P#210) L2 L#83 (512KB) + L1d L#83 (32KB) + L1i L#83 (32KB) + Core L#83 PU L#166 (P#83) PU L#167 (P#211) L2 L#84 (512KB) + L1d L#84 (32KB) + L1i L#84 (32KB) + Core L#84 PU L#168 (P#84) PU L#169 (P#212) L2 L#85 (512KB) + L1d L#85 (32KB) + L1i L#85 (32KB) + Core L#85 PU L#170 (P#85) PU L#171 (P#213) L2 L#86 (512KB) + L1d L#86 (32KB) + L1i L#86 (32KB) + Core L#86 PU L#172 (P#86) PU L#173 (P#214) L2 L#87 (512KB) + L1d L#87 (32KB) + L1i L#87 (32KB) + Core L#87 PU L#174 (P#87) PU L#175 (P#215) L3 L#11 (32MB) L2 L#88 (512KB) + L1d L#88 (32KB) + L1i L#88 (32KB) + Core L#88 PU L#176 (P#88) PU L#177 (P#216) L2 L#89 (512KB) + L1d L#89 (32KB) + L1i L#89 (32KB) + Core L#89 PU L#178 (P#89) PU L#179 (P#217) L2 L#90 (512KB) + L1d L#90 (32KB) + L1i L#90 (32KB) + Core L#90 PU L#180 (P#90) PU L#181 (P#218) L2 L#91 (512KB) + L1d L#91 (32KB) + L1i L#91 (32KB) + Core L#91 PU L#182 (P#91) PU L#183 (P#219) L2 L#92 (512KB) + L1d L#92 (32KB) + L1i L#92 (32KB) + Core L#92 PU L#184 (P#92) PU L#185 (P#220) L2 L#93 (512KB) + L1d L#93 (32KB) + L1i L#93 (32KB) + Core L#93 PU L#186 (P#93) PU L#187 (P#221) L2 L#94 (512KB) + L1d L#94 (32KB) + L1i L#94 (32KB) + Core L#94 PU L#188 (P#94) PU L#189 (P#222) L2 L#95 (512KB) + L1d L#95 (32KB) + L1i L#95 (32KB) + Core L#95 PU L#190 (P#95) PU L#191 (P#223) L3 L#12 (32MB) L2 L#96 (512KB) + L1d L#96 (32KB) + L1i L#96 (32KB) + Core L#96 PU L#192 (P#96) PU L#193 (P#224) L2 L#97 (512KB) + L1d L#97 (32KB) + L1i L#97 (32KB) + Core L#97 PU L#194 (P#97) PU L#195 (P#225) L2 L#98 (512KB) + L1d L#98 (32KB) + L1i L#98 (32KB) + Core L#98 PU L#196 (P#98) PU L#197 (P#226) L2 L#99 (512KB) + L1d L#99 (32KB) + L1i L#99 (32KB) + Core L#99 PU L#198 (P#99) PU L#199 (P#227) L2 L#100 (512KB) + L1d L#100 (32KB) + L1i L#100 (32KB) + Core L#100 PU L#200 (P#100) PU L#201 (P#228) L2 L#101 (512KB) + L1d L#101 (32KB) + L1i L#101 (32KB) + Core L#101 PU L#202 (P#101) PU L#203 (P#229) L2 L#102 (512KB) + L1d L#102 (32KB) + L1i L#102 (32KB) + Core L#102 PU L#204 (P#102) PU L#205 (P#230) L2 L#103 (512KB) + L1d L#103 (32KB) + L1i L#103 (32KB) + Core L#103 PU L#206 (P#103) PU L#207 (P#231) L3 L#13 (32MB) L2 L#104 (512KB) + L1d L#104 (32KB) + L1i L#104 (32KB) + Core L#104 PU L#208 (P#104) PU L#209 (P#232) L2 L#105 (512KB) + L1d L#105 (32KB) + L1i L#105 (32KB) + Core L#105 PU L#210 (P#105) PU L#211 (P#233) L2 L#106 (512KB) + L1d L#106 (32KB) + L1i L#106 (32KB) + Core L#106 PU L#212 (P#106) PU L#213 (P#234) L2 L#107 (512KB) + L1d L#107 (32KB) + L1i L#107 (32KB) + Core L#107 PU L#214 (P#107) PU L#215 (P#235) L2 L#108 (512KB) + L1d L#108 (32KB) + L1i L#108 (32KB) + Core L#108 PU L#216 (P#108) PU L#217 (P#236) L2 L#109 (512KB) + L1d L#109 (32KB) + L1i L#109 (32KB) + Core L#109 PU L#218 (P#109) PU L#219 (P#237) L2 L#110 (512KB) + L1d L#110 (32KB) + L1i L#110 (32KB) + Core L#110 PU L#220 (P#110) PU L#221 (P#238) L2 L#111 (512KB) + L1d L#111 (32KB) + L1i L#111 (32KB) + Core L#111 PU L#222 (P#111) PU L#223 (P#239) L3 L#14 (32MB) L2 L#112 (512KB) + L1d L#112 (32KB) + L1i L#112 (32KB) + Core L#112 PU L#224 (P#112) PU L#225 (P#240) L2 L#113 (512KB) + L1d L#113 (32KB) + L1i L#113 (32KB) + Core L#113 PU L#226 (P#113) PU L#227 (P#241) L2 L#114 (512KB) + L1d L#114 (32KB) + L1i L#114 (32KB) + Core L#114 PU L#228 (P#114) PU L#229 (P#242) L2 L#115 (512KB) + L1d L#115 (32KB) + L1i L#115 (32KB) + Core L#115 PU L#230 (P#115) PU L#231 (P#243) L2 L#116 (512KB) + L1d L#116 (32KB) + L1i L#116 (32KB) + Core L#116 PU L#232 (P#116) PU L#233 (P#244) L2 L#117 (512KB) + L1d L#117 (32KB) + L1i L#117 (32KB) + Core L#117 PU L#234 (P#117) PU L#235 (P#245) L2 L#118 (512KB) + L1d L#118 (32KB) + L1i L#118 (32KB) + Core L#118 PU L#236 (P#118) PU L#237 (P#246) L2 L#119 (512KB) + L1d L#119 (32KB) + L1i L#119 (32KB) + Core L#119 PU L#238 (P#119) PU L#239 (P#247) L3 L#15 (32MB) L2 L#120 (512KB) + L1d L#120 (32KB) + L1i L#120 (32KB) + Core L#120 PU L#240 (P#120) PU L#241 (P#248) L2 L#121 (512KB) + L1d L#121 (32KB) + L1i L#121 (32KB) + Core L#121 PU L#242 (P#121) PU L#243 (P#249) L2 L#122 (512KB) + L1d L#122 (32KB) + L1i L#122 (32KB) + Core L#122 PU L#244 (P#122) PU L#245 (P#250) L2 L#123 (512KB) + L1d L#123 (32KB) + L1i L#123 (32KB) + Core L#123 PU L#246 (P#123) PU L#247 (P#251) L2 L#124 (512KB) + L1d L#124 (32KB) + L1i L#124 (32KB) + Core L#124 PU L#248 (P#124) PU L#249 (P#252) L2 L#125 (512KB) + L1d L#125 (32KB) + L1i L#125 (32KB) + Core L#125 PU L#250 (P#125) PU L#251 (P#253) L2 L#126 (512KB) + L1d L#126 (32KB) + L1i L#126 (32KB) + Core L#126 PU L#252 (P#126) PU L#253 (P#254) L2 L#127 (512KB) + L1d L#127 (32KB) + L1i L#127 (32KB) + Core L#127 PU L#254 (P#127) PU L#255 (P#255) HostBridge PCIBridge PCI a3:00.0 (SATA) PCIBridge PCI a4:00.0 (SATA) HostBridge PCIBridge PCI c5:00.0 (SATA) PCIBridge PCI c6:00.0 (SATA) [chibi@f40 ~]$ sudo nvme list [sudo] chibi のパスワード: Node Generic SN Model Namespace Usage Format FW Rev --------------------- --------------------- -------------------- ---------------------------------------- ---------- -------------------------- ---------------- -------- /dev/nvme0n1 /dev/ng0n1 P02921104746 PLEXTOR PX-256M9PeG 0x1 256.06 GB / 256.06 GB 512 B + 0 B 1.07 [chibi@f40 ~]$ sudo nvme smart-log /dev/nvme0n1 Smart Log for NVME device:nvme0n1 namespace-id:ffffffff critical_warning : 0 temperature : 28 °C (301 K) available_spare : 100% available_spare_threshold : 0% percentage_used : 0% endurance group critical warning summary: 0 Data Units Read : 3308550 (1.69 TB) Data Units Written : 7186591 (3.68 TB) host_read_commands : 50042394 host_write_commands : 62955927 controller_busy_time : 5374 power_cycles : 552 power_on_hours : 247 unsafe_shutdowns : 156 media_errors : 0 num_err_log_entries : 0 Warning Temperature Time : 0 Critical Composite Temperature Time : 0 Temperature Sensor 1 : 28 °C (301 K) Thermal Management T1 Trans Count : 0 Thermal Management T2 Trans Count : 0 Thermal Management T1 Total Time : 0 Thermal Management T2 Total Time : 0 [chibi@f40 ~]$